The CY7C1441AV25-133BZXIT is officially obsolete per Infineon's product status. No direct pin-compatible replacement is listed on the manufacturer's cross-reference.
36 Mbit synchronous SDR SRAM — 1M x 36 organization
This is a 36 Mbit synchronous single-data-rate (SDR) SRAM organized as 1M words by 36 bits. The 133 MHz clock frequency sets the bus cycle time, and the 6.5 ns access time defines the read latency from clock edge to data valid. The parallel memory interface is typical for high-throughput cache or buffer applications in networking, telecom, or industrial control where deterministic read latency matters.
2.5V supply with industrial temperature range
Operates from a 2.375V to 2.625V core supply — a 2.5V nominal rail with ±5% tolerance. The 165-FBGA (15x17 mm) package requires a multilayer PCB for fan-out of the fine-pitch balls; the 165-LBGA variant shares the same footprint.
Tape & Reel for automated pick-and-place
Supplied in Tape & Reel (TR) format, suitable for high-volume SMT assembly. The surface-mount 165-FBGA package is moisture-sensitive; bake and dry-pack handling per J-STD-033 apply before reflow.