Skip to main content
Infineon Technologies CY7C1413KV18-333BZXI — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C1413KV18-333BZXI SRAM, 36 Mbit QDR II, 333 MHz

MPNCY7C1413KV18-333BZXI
Active

Infineon CY7C1413KV18-333BZXI, 36 Mbit synchronous QDR II SRAM, 333 MHz clock, 2M x 18 organization, 1.7–1.9 V supply, –40 to 85 °C, 165-LBGA tray.

$62.2500Ref. price · indicative, final on quote
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
  • Date & lot codes on quoteStated per line before you commit; label photos on request.
  • MSL-compliant ESD packingMoisture-sealed bags with indicator cards; reels photo-verified.
  • PayPal buyer protectionPay by T/T, PayPal or Payoneer — card payments covered end to end.

Specifications

CY7C1413KV18-333BZXI Technical Specifications
ParameterValue
Memory typeVolatile
Mounting typeSurface Mount
Voltage1.7V ~ 1.9V
Frequency333 MHz
Memory interfaceParallel
Operating temperature-40°C ~ 85°C (TA)
PackageTray
TechnologySRAM - Synchronous, QDR II
Memory size36Mbit
Memory formatSRAM
Case165-LBGA
Memory organization2M x 18

Product details

The Infineon CY7C1413KV18-333BZXI is a 36 Mbit synchronous QDR II SRAM organized 2M x 18, clocked at 333 MHz over a parallel interface. It operates from a 1.7–1.9 V core supply and is specified across the industrial temperature range of –40 to 85 °C. The device comes in a 165-ball LBGA (13x15 mm FBGA) and is intended for high-throughput buffering in networking, telecom line cards, and FPGA-attached data-path applications where back-to-back read-write cycles must eliminate bus-turnaround dead cycles.

333 MHz clock and QDR II bus efficiency

The 333 MHz clock rate supports high-speed packet processors and FPGAs. QDR II architecture separates read and write data ports, so the bus never stalls for turnaround.

Lifecycle and sourcing

The CY7C1413KV18-333BZXI carries an active product status. It is sourced through independent distribution and quoted to order against an RFQ.

Frequently asked questions

What is the memory organization and clock speed of the CY7C1413KV18-333BZXI?

It is a 36 Mbit QDR II SRAM organized 2M x 18 with a 333 MHz clock interface.

What package does the CY7C1413KV18-333BZXI come in?

It is supplied in a 165-LBGA (13x15 mm FBGA) package on tray.