The Infineon CY7C1413KV18-333BZXI is a 36 Mbit synchronous QDR II SRAM organized 2M x 18, clocked at 333 MHz over a parallel interface. It operates from a 1.7–1.9 V core supply and is specified across the industrial temperature range of –40 to 85 °C. The device comes in a 165-ball LBGA (13x15 mm FBGA) and is intended for high-throughput buffering in networking, telecom line cards, and FPGA-attached data-path applications where back-to-back read-write cycles must eliminate bus-turnaround dead cycles.
333 MHz clock and QDR II bus efficiency
The 333 MHz clock rate supports high-speed packet processors and FPGAs. QDR II architecture separates read and write data ports, so the bus never stalls for turnaround.