256Kbit asynchronous SRAM — 12 ns access, 32K×8, 3.3 V
The CY7C1399BN-12VXCT is a 256Kbit asynchronous SRAM organized as 32K words by 8 bits. It delivers a 12 ns access time from a 3 V to 3.6 V supply.
12 ns access time — what it means for the bus
The 12 ns access time sets the window from address valid to data valid on a read cycle. The 12 ns write cycle time is symmetrical.
Obsolete — sourcing reality
This part is marked obsolete by Cypress (Infineon). We source it against an RFQ from our independent distribution network.
