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Infineon Technologies CY7C1372D-200AXCT — Memory (DRAM / SRAM / Flash / EEPROM)

CY7C1372D-200AXCT Infineon NoBL SRAM, 18Mbit, 200 MHz

MPNCY7C1372D-200AXCT
Obsolete

Infineon Technologies NoBL™ synchronous SRAM, CY7C1372D-200AXCT, 18Mbit (1M x 18), 200 MHz clock, 3 ns access time, 3.135V–3.6V supply, 0°C–70°C, 100-TQFP (14x20 mm), Tape & Reel.

Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C1372D-200AXCT specifications
ParameterValue
SeriesNoBL™
Memory typeVolatile
MountingSurface Mount
Voltage3.135V ~ 3.6V
Frequency200 MHz
Memory interfaceParallel
Operating temperature0°C~70°C(TA)
PackageTape & Reel (TR)
TechnologySRAM - Synchronous, SDR
Access time3 ns
Memory size18Mbit
Memory formatSRAM
Case100-LQFP
Memory organization1M x 18

Product details

18 Mbit synchronous SRAM — 200 MHz NoBL pipeline

The CY7C1372D-200AXCT is a 18 Mbit synchronous SRAM organised as 1M x 18, clocked at 200 MHz with a 3 ns access time. It belongs to the NoBL™ (No Bus Latency) family, which eliminates the dead cycle between read and write transitions — the bus turns around without an idle clock, so a controller can issue a read immediately after a write at full 200 MHz rate. The parallel interface is a standard synchronous SRAM bus with registered address and data paths.

Package and board-fit — 100-TQFP, 14x20 mm body

The supplier device package is 100-TQFP (14x20) — the footprint matches standard JEDEC MO-136. The tape-and-reel packaging is suited for automated pick-and-place assembly.

The part is not recommended for new designs; existing BOM lines must be sourced through independent surplus or broker channels.

Frequently asked questions

What is the key advantage of the NoBL architecture in this SRAM?

NoBL (No Bus Latency) eliminates the idle clock cycle between read and write operations. At 200 MHz, that means the bus can sustain back-to-back read-write transitions without a dead cycle, improving throughput in cache or buffer applications where the controller alternates between reading and writing.