The Infineon CY7C1371D-133BGCT is a 18 Mbit synchronous SRAM organized 512K x 36, built on the NoBL™ (No Bus Latency) architecture. It clocks at 133 MHz with a 6.5 ns access time, eliminating dead cycles between read and write turns on the bus — useful for high-throughput data buffers in network switches, base stations, or test equipment where back-to-back transactions matter. Supply range is 3.135 V to 3.6 V, commercial temperature grade (0°C to 70°C), in a 119-ball PBGA (14x22 mm) footprint.
Obsolete — sourcing through surplus channel
The CY7C1371D-133BGCT is marked Obsolete by Infineon. No last-time-buy window remains open; the only supply path is the independent surplus and broker channel. We source and quote it to order against an RFQ — availability and current pricing confirmed at quote time. No official pin-compatible successor is listed in the Infineon portfolio, so any replacement requires a board respin or a validated second-source qualification.
