18 Mbit synchronous SRAM in a 165-ball BGA
It operates with a 200 MHz clock and delivers a 3 ns access time, running from a 2.375 V to 2.625 V supply.
The 200 MHz clock rate and 3 ns access time are the headline performance specs. At 200 MHz the memory can sustain back-to-back reads and writes without dead cycles, which is the whole point of the NoBL™ architecture — it eliminates the bus-turnaround penalty that standard synchronous SRAMs incur. The 3 ns access time means the first data word appears three clock edges after the address is presented, tight enough to keep a high-speed pipeline fed without wait states. If your system runs a bus clock near 200 MHz, this part fits without adding latency.
This part is listed as obsolete. That means Infineon no longer manufactures it, and the only available stock is what remains in the supply chain — new-old-stock, surplus, or broker inventory. If you have an active BOM line using this SRAM, you will need to source it through independent distribution.
165-ball FBGA — board-level considerations
The 165-ball FBGA (13 x 15 mm) is a fine-pitch BGA. Rework requires a hot-air station with a nozzle sized for the package, and the board must have a solder mask defined pad layout matching the Cypress footprint.