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Infineon Technologies CY7C136-25NXC — Memory (DRAM / SRAM / Flash / EEPROM)

Infineon CY7C136-25NXC SRAM, 16Kbit Dual-Port Asynchronous

MPNCY7C136-25NXC
Obsolete

Infineon CY7C136-25NXC, SRAM - Dual Port, Asynchronous, 16Kbit (2K x 8), 25 ns access time, 4.5V ~ 5.5V supply, 0°C ~ 70°C, 52-BQFP, Surface Mount, Tray.

Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C136-25NXC specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Voltage4.5V ~ 5.5V
Memory interfaceParallel
Operating temperature0°C~70°C(TA)
PackageTray
TechnologySRAM - Dual Port, Asynchronous
Access time25 ns
Memory size16Kbit
Memory formatSRAM
Case52-BQFP
Memory organization2K x 8
Write cycle time - word, page25ns

Product details

The Infineon CY7C136-25NXC is a 16 Kbit (organized as 2K x 8) dual-port asynchronous SRAM in a 52-PQFP package. Its 25 ns access time means the memory can complete a read or write cycle within 25 ns of the address being valid, which on a 5 V bus translates to a theoretical maximum bus throughput of 40 MHz before wait states. The dual-port architecture gives two independent ports with separate address, data, and control lines, allowing two bus masters — say a DSP and a microcontroller, or two processors in a shared-memory system — to access the same array simultaneously without arbitration logic on every cycle.

The 25 ns access time and matching 25 ns write cycle time set the memory's speed grade. In a system running a 40 MHz bus clock (25 ns period), this part allows zero-wait-state back-to-back reads and writes if the address hold and data setup margins are met. At higher bus frequencies, the designer must insert wait states or pipeline the access. The write cycle time of 25 ns applies to both word and page modes, so the page-mode write benefit is absent here — each write takes the full 25 ns cycle. For a legacy 5 V system that needs a shared buffer between two asynchronous controllers, this access time is adequate; for a 66 MHz or faster bus, look for a 12 ns or 10 ns dual-port SRAM.

Infineon (formerly Cypress) has discontinued production. The only supply channel is surplus and broker inventory — last-time-buy stock that has already been manufactured and is now in independent distribution. When sourcing this part, the buyer should verify date-code consistency and marking integrity, as the end of production means any new-old-stock found in the open market should be screened for authenticity. The 52-PQFP package is a surface-mount gull-wing package that is straightforward to inspect visually for re-marking or sanding.

5 V supply and commercial temperature — environment limits

This limits the part to indoor, temperature-controlled equipment — office networking gear, test equipment, telecom line cards in conditioned bays, or industrial controllers in a climate-controlled cabinet. It is not rated for outdoor, automotive, or extended-temperature industrial environments.

Frequently asked questions

Where can I buy CY7C136-25NXC?

CY7C136-25NXC is obsolete and no longer in production. Submit an RFQ for current availability and pricing; each quote is confirmed at the time of request against our multi-source supply reach.

Is CY7C136-25NXC obsolete?

Yes, CY7C136-25NXC is officially obsolete per Infineon's product status. No new production is planned. The only supply channel is surplus and broker inventory.

What is the replacement for CY7C136-25NXC?

A functionally equivalent dual-port asynchronous SRAM in the 16 Kbit density with 25 ns access time and 5 V supply would need to be sourced from a different vendor or a different density/speed grade from Infineon's current portfolio. Cross-reference searches against the base product number CY7C136 may reveal pin-compatible variants from other manufacturers, but none is confirmed in this record.