The CY7C1339G-133AXIT is officially listed as Obsolete by Infineon Technologies. No official successor or second-source part number is provided in the product record.
4Mbit synchronous SRAM for high-speed cache
The CY7C1339G-133AXIT is a 4Mbit synchronous SRAM organized as 128K x 32, clocked at 133 MHz with a 4 ns access time. Operating from a 3.15V to 3.6V supply, it uses a parallel interface and is housed in a 100-LQFP package (14x20 mm). The industrial temperature range (-40°C to 85°C) suits it for networking equipment, base stations, and industrial controllers where a deterministic, low-latency memory buffer is required.
133 MHz clock, 4 ns access — the timing budget
The 133 MHz clock rate means the memory can sustain a 7.5 ns cycle time; the 4 ns access time is the latency from address to data valid, which determines the wait-state insertion in a CPU or FPGA memory controller. At 133 MHz, the 4 ns access time typically allows zero-wait-state operation in a 133 MHz bus, but the actual margin depends on the controller's setup/hold timing and PCB trace delay. The 128K x 32 organization provides a 32-bit word width per access, making it a natural fit for 32-bit processor buses without external muxing.