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Infineon Technologies CY7C1311CV18-250BZC — Memory (DRAM / SRAM / Flash / EEPROM)

Cypress CY7C1311CV18-250BZC QDR II SRAM, 18Mbit, 250 MHz

MPNCY7C1311CV18-250BZC
Obsolete

Cypress CY7C1311CV18-250BZC, QDR II synchronous SRAM, 18Mbit (2M x 8), 250 MHz clock, parallel interface, 1.7 V to 1.9 V supply, 0°C to 70°C, 165-FBGA (13x15 mm) tray.

$32.2700Ref. price · indicative, final on quote
Infineon Technologies CY7C1311CV18-250BZC datasheet (PDF)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

CY7C1311CV18-250BZC specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage1.7V ~ 1.9V
Clock frequency250 MHz
Memory interfaceParallel
Operating temperature0°C~70°C(TA)
PackageTray
TechnologySRAM - Synchronous, QDR II
Memory size18Mbit
Memory formatSRAM
Case165-LBGA
Memory organization2M x 8

Product details

QDR II synchronous SRAM — 250 MHz, no dead cycles

Its 250 MHz clock eliminates the bus-turnaround dead cycles typical of conventional SRAM, delivering back-to-back read and write bursts at full throughput — essential for high-bandwidth networking buffers, telecom line cards, and packet-processing engines where every clock cycle counts. The 1.7 V to 1.9 V core supply keeps I/O levels compatible with low-voltage logic families, and the 165-FBGA (13x15 mm) package fits dense PCB layouts.

At 250 MHz, the QDR II interface transfers data on both clock edges per port.

That limits deployment to indoor, temperature-controlled environments — server rooms, telecom central offices, test equipment — not outdoor or industrial floor applications where ambient can swing beyond that window.

Frequently asked questions

What is the memory organization of CY7C1311CV18-250BZC?

It is organized as 2M x 8 (18Mbit total), with a parallel interface and a 250 MHz clock.

What package does CY7C1311CV18-250BZC use?

It comes in a 165-ball FBGA (13x15 mm), surface-mount, supplied in tray packaging.