Infineon CY7C131-55JXIT, SRAM - Dual Port, Asynchronous, 8Kbit (1K x 8), 55 ns access, Parallel interface, 4.5V~5.5V supply, -40°C~85°C, 52-PLCC (19.13x19.13), Tape & Reel.
| Parameter | Value |
|---|---|
| Memory type | Volatile |
| Mounting | Surface Mount |
| Supply voltage | 4.5V ~ 5.5V |
| Memory interface | Parallel |
| Operating temperature | -40°C ~ 85°C (TA) |
| Package | Tape & Reel (TR) |
| Technology | SRAM - Dual Port, Asynchronous |
| Access time | 55 ns |
| Memory size | 8Kbit |
| Memory format | SRAM |
| Case | 52-LCC (J-Lead) |
| Memory organization | 1K x 8 |
| Write cycle time - word, page | 55ns |
The Infineon CY7C131-55JXIT is an 8Kbit asynchronous dual-port SRAM organized as 1K x 8. It gives two independent processors simultaneous access to a common memory array without bus arbitration logic.
No further factory orders or last-time-buy windows are open.
Yes, Infineon lists the CY7C131-55JXIT as obsolete. No factory production or last-time-buy remains.
The evidence does not list an official successor order code. For a pin-compatible alternative, search the CY7C131 base product family in the same 52-PLCC package — density and speed variants may still be active. We can help cross-reference against your BOM on request.
8Kbit asynchronous dual-port SRAM organized 1K x 8, 55 ns access time, parallel interface, 4.5V to 5.5V supply, -40°C to 85°C operating temperature, in a 52-PLCC package.