20 ns asynchronous SRAM for legacy 5V buses
The CY7C128A-20VC is a 16Kbit asynchronous SRAM organized as 2K x 8, with a 20 ns access time that sets the read-cycle floor on a 5V parallel bus. At 20 ns, the part keeps up with a 50 MHz bus clock without wait states, but the real margin comes from the 20 ns write cycle — word and page writes complete in a single cycle, so the bus master doesn't stretch the strobe. Supply range is 4.5V to 5.5V, which means this part lives on a legacy 5V rail. Dropping it onto a 3.3V memory bus without a level translator will leave the inputs below VIH and the outputs below VOH — the bus won't see valid logic levels.
24-SOJ package — rework-friendly gull-wing
The 24-SOJ (Small Outline J-lead) package uses a gull-wing lead form that lifts the body off the board. That air gap makes hand rework straightforward — a hot-air station at 300°C with a fine nozzle lifts the part cleanly without wicking solder under the body. The J-lead profile also gives a visible solder joint for inspection, unlike a BGA where the joint is hidden. The package is surface-mount, not through-hole, so the board needs a 24-pin SOJ footprint. The 0.300-inch body width is standard — the same footprint used by other 24-pin SOJ SRAMs from the era, which simplifies a drop-in replacement if the original part is gone.
That means the manufacturer no longer produces it, and no pin-compatible drop-in from Infineon exists for new designs. Availability is lot-specific and confirmed at quote time — the page does not carry live stock data. A quote request will return current pricing and lead time for the quantity needed.
Commercial temperature — indoor equipment only
This part is suited for benchtop instruments, office equipment, or telecom gear in a climate-controlled room.