36 Mbit DDR II+ SRAM at 400 MHz — what this part was built for
The Cypress CY7C12681KV18-400BZXC is a 36 Mbit synchronous SRAM using a DDR II+ interface, organized as 2M words by 18 bits. It clocks at 400 MHz, which means back-to-back read-write cycles with no dead cycles — exactly what a high-throughput packet buffer or network line card needs. The 1.7 V to 1.9 V core supply keeps I/O power low, but the commercial temperature range (0°C to 70°C) limits it to indoor, temperature-controlled gear like telecom central-office switches or enterprise router line cards.
Obsolete — sourcing the CY7C12681KV18-400BZXC today
400 MHz clock — what it means for the bus
The DDR II+ interface transfers data on both clock edges at 400 MHz. For a 2M x 18 configuration, this provides high bandwidth.