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Infineon Technologies CY7C10612G30-10ZSXIT — Memory (DRAM / SRAM / Flash / EEPROM)

Cypress CY7C10612G30-10ZSXIT SRAM, 16Mbit Async, 10 ns

MPNCY7C10612G30-10ZSXIT
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Cypress CY7C10612G30-10ZSXIT, 16Mbit asynchronous SRAM, 1M x 16 organization, 10 ns access time, parallel interface, 54-TSOP II, 3 V to 3.6 V supply, -40 to 85 °C industrial temperature, Tape & Reel.

$19.2500Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CY7C10612G30-10ZSXIT specifications
ParameterValue
Memory typeVolatile
MountingSurface Mount
Supply voltage3V ~ 3.6V
Memory interfaceParallel
Operating temperature-40°C~85°C(TA)
PackageTape & Reel (TR)
TechnologySRAM - Asynchronous
Access time10 ns
Memory size16Mbit
Memory formatSRAM
Case54-TSOP (0.400\", 10.16mm Width)
Memory organization1M x 16
Write cycle time - word, page10ns

Product details

16 Mbit async SRAM — 10 ns access, 1M x 16 bus

The Cypress CY7C10612G30-10ZSXIT is a 16 Mbit asynchronous SRAM organized as 1M x 16 bits, with a 10 ns access time.

10 ns access time — what it means for bus timing

The 1M x 16 organization matches a 16-bit data bus directly, eliminating the need for byte-lane muxing that a x8 part would require. Write cycle time is also 10 ns, so back-to-back writes keep the pipeline full.

Industrial temperature grade and package

Frequently asked questions

What is the access time of CY7C10612G30-10ZSXIT?

The access time is 10 ns, which determines how quickly data appears on the bus after the address is presented.

What package does CY7C10612G30-10ZSXIT come in?

It is supplied in a 54-TSOP II package (54-TSOP, 0.400" body width, 10.16 mm pitch), Tape & Reel.