The CY7C1020CV33-10ZXCT is a 512Kbit asynchronous SRAM organized 32K x 16, with a 10 ns access time. That 10 ns window sets the read-cycle ceiling: on a 33 MHz bus the memory controller has roughly 30 ns total for address-to-data valid, so a 10 ns SRAM leaves 20 ns for the controller decode and board trace delay — enough margin for a single-load bus without wait states.
Infineon lists this part as Obsolete. For a legacy board that still uses this exact footprint and supply voltage, the only sourcing path is through independent distribution — we can quote against your BOM quantity from available inventory on the open market.
Package and supply — what to check before ordering
The part comes in a 44-TSOP II (0.400" body width, 10.16 mm) surface-mount package, supplied on Tape & Reel. Supply voltage is 3V to 3.6V — confirm your board's Vdd rail is within that range; a 3.3V rail is the nominal fit.