12 ns asynchronous SRAM in a 32-SOJ footprint
The Infineon CY7C1018CV33-12VXI is a 1 Mbit asynchronous SRAM organized as 128K x 8 bits, with a 12 ns access time. The 32-SOJ package (0.300" body width) is a surface-mount footprint common in mid-1990s through 2010s designs; it solders directly to the board and is reworkable with standard hot-air tools.
For designs that already carry this SRAM on the BOM, the only channel is the surplus and broker market.
What the 12 ns access time means for the bus
A 12 ns access time means the SRAM presents valid data on its outputs within 12 ns of the address being stable and chip enable asserted.
Package and footprint: 32-SOJ
The 32-SOJ (Small Outline J-lead) package has a 0.300" body width and 7.62 mm nominal width, with J-bend leads on 1.27 mm pitch. The J-lead form gives good coplanarity and is easier to inspect than a gull-wing; rework with hot air is straightforward if the board has adequate thermal relief on the ground plane.
