Synchronous dual-port SRAM, 133 MHz, 256K x 18
The CY7C0832AV-133AXI is a 4.5 Mbit synchronous dual-port SRAM organized as 256K words by 18 bits, clocked at 133 MHz. The 18-bit word width (16 data + 2 parity or control bits) matches common 18-bit bus widths in telecom line cards and industrial controllers. At 133 MHz, the synchronous interface delivers a peak bandwidth of 2.4 Gbit/s per port, assuming a full bus transaction each cycle.
Housed in a 120-lead LQFP (14x14 mm body, 0.50 mm pitch), the CY7C0832AV-133AXI is a surface-mount part that reflows with standard lead-free profiles.
Infineon lists the CY7C0832AV-133AXI as Obsolete. No official successor part number has been published, and the original Cypress (now Infineon) dual-port SRAM family has been gradually phased out as designs migrate to QDR or DDR SRAM or to embedded block RAM in FPGAs. For a BOM line that cannot be redesigned, the only sourcing path is the open market — excess inventory, broker stock, or distributor overstock. We source this part per RFQ against your required quantity and date code window.