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Infineon Technologies CY7B9940V-2AC — Clock & Timing ICs

CY7B9940V-2AC RoboClockII Junior PLL Clock Buffer, 200 MHz

MPNCY7B9940V-2AC
End of Life

Cypress RoboClockII™ Junior, PLL-based clock buffer/zero-delay buffer, 200 MHz max frequency, 4:10 input:output ratio, LVPECL/LVTTL input, LVTTL output, 2.97 V to 3.63 V supply, 44-TQFP, 0°C to 70°C.

$15.81Ref. price · indicative, final on quote
Infineon Technologies CY7B9940V-2AC datasheet (PDF)
Packaging44-LQFP
RoHSRoHS non-compliant
SeriesRoboClockII™ Junior
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

CY7B9940V-2AC specifications
ParameterValue
TypeClock Buffer, Zero Delay Buffer
SeriesRoboClockII™ Junior
MountingSurface Mount
Supply voltage2.97V ~ 3.63V
Frequency - max200MHz
Operating temperature0°C ~ 70°C (TA)
PLLYes
InputLVPECL, LVTTL
OutputLVTTL
PackageBulk
Case44-LQFP
Divider (Multiplier)Yes/No
Number of circuits1
Ratio - Input:Output4:10
Differential - Input:OutputYes/No

Product details

PLL-based clock distribution for 200 MHz trees

The Cypress CY7B9940V-2AC is a PLL-based clock buffer from the RoboClockII Junior family. It accepts LVPECL or LVTTL inputs and delivers LVTTL outputs across a 4:10 input-to-output ratio, with a maximum operating frequency of 200 MHz.

The 4:10 ratio means this buffer can accept up to four independent clock inputs and distribute them to ten outputs. In practice, that lets a designer fan out a single master clock to multiple destination ICs (FPGAs, PHYs, ASICs) while keeping skew low across the bank. The differential input (LVPECL) option is useful when the reference clock arrives over a twisted pair or a long board trace; the single-ended LVTTL input works for local on-board oscillators. All ten outputs are LVTTL, so the downstream logic must accept that logic level — no CML or HCSL on the output side.

Supply and temperature — deployment context

For RoHS-compliant builds, a lead-free variant or a different buffer should be selected.

Frequently asked questions

What is the equivalent or replacement for CY7B9940V-2AC?

A functional peer is the CY2305SXI-1HT, also a zero-delay buffer, but with a 1:5 fanout ratio (vs 4:10), no differential input, and a maximum frequency of 133.33 MHz. The CY7B9940V-2AC offers higher fanout and differential input capability, so the CY2305 is not a direct pin-compatible substitute — it fits simpler, lower-speed clock trees.