16 Mbit asynchronous SRAM with 45 ns access
The CY62167G30-45BVXI is a 16 Mbit asynchronous SRAM from Infineon's MoBL® series, organised as 2M x 8 or 1M x 16 via a parallel interface. The 45 ns access time sets the ceiling for read-cycle latency — at 22 MHz equivalent, it fits bus architectures where the memory controller expects data within a single wait state on a typical 66 MHz local bus.
Package and board-fit: 48-VFBGA (6x8 mm)
Housed in a 48-ball VFBGA measuring 6x8 mm (supplier device package 48-VFBGA). The 0.75 mm ball pitch requires a four-layer PCB for fan-out on the inner rows — two-layer breakout is possible only if the outer two rows carry all address/data lines and the inner balls are limited to VDD and VSS.