125 MHz LVDS clock generator with integrated PLL
The Infineon (Cypress) CY2XL13ZXI01 is a single-channel clock generator that takes a crystal input and produces a differential LVDS output at frequencies up to 125 MHz. The on-chip PLL synthesises the output from a lower-frequency reference crystal, which saves the cost and board area of a separate high-frequency oscillator. It is designed for applications that need a clean, low-jitter differential clock — think SERDES reference clocks, FPGA reference inputs, or high-speed ADC/DAC sampling clocks in industrial and telecom environments.
Supply rails and temperature grade
These are not a single wide-range supply — the part expects one or the other, so the board's power tree must deliver a clean rail within the chosen window.
Package and footprint
The 8-TSSOP footprint is common across multiple clock generators from this family, so a layout designed for one variant often accepts another with minimal respin.
Sourcing posture
It is a current-production part available through franchised and independent distribution. For volume BOM lines or scheduled releases, we quote against an RFQ with confirmed availability and current pricing at quote time.