The Cypress CY2SSTV857ZC-27T is a PLL-based zero delay buffer in the SSTV series, designed to regenerate and distribute a reference clock with near-zero propagation delay between input and output. It accepts a differential clock input and delivers ten differential clock outputs, all running at up to 200 MHz. The 1:10 fanout ratio means a single device can feed ten DDR memory or logic loads without needing a second buffer stage, which simplifies the clock tree on a memory-intensive board.
The supply range is 2.38 V to 2.63 V. The differential input and output paths (Yes/Yes per the spec) mean this part is meant for LVDS or HCSL-style signaling, not single-ended CMOS clocks.
Listed as Active in production status.
