Chipset-specific clock tree in a single package
The Cypress CY28349OC is a PLL-based clock synthesizer and driver designed specifically for Intel 830M and 845 chipset platforms. It accepts a single LVTTL or crystal input and distributes up to 20 clock outputs, covering the full clock tree for those chipset generations — CPU, PCI, AGP, and SDRAM reference frequencies — without external fanout buffers. The 1:20 fanout ratio means one input drives twenty outputs, which simplifies board layout and reduces component count in multi-load clock distribution. Operating from a 3.135 V to 3.465 V supply and rated for 0°C to 70°C, this part fits indoor, commercial-temperature equipment.
Lifecycle and compliance — active but not RoHS
The CY28349OC is listed as Active in production status. It is marked RoHS non-compliant.
What the 1:20 ratio and 1 MHz max frequency mean for your design
The 1:20 input-to-output ratio eliminates the need for multiple clock buffers when distributing a reference to many loads. The maximum frequency is 1 MHz. The single PLL circuit handles the multiplication and skew management for all outputs. There is no divider on the output path (Divider/Multiplier: Yes/No).
Package and footprint — 48-BSSOP (7.50 mm width)
The part comes in a 48-lead BSSOP package with a 7.50 mm body width (0.295 inch). The supplier device package is 48-SSOP.