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Infineon Technologies CY28346ZC-2 — Discrete Semiconductors

Cypress CY28346ZC-2 Clock Generator, PLL, 200 MHz, 56-TSSOP

MPNCY28346ZC-2
End of Life

Cypress CY28346ZC-2, processor-specific clock generator, PLL Yes, Input Crystal, Output HCSL LVCMOS, Frequency - Max 200MHz, 1:22 fanout, 56-TSSOP II, 0°C to 85°C.

$5.86Ref. price · indicative, final on quote
Packaging56-TFSOP (0.240", 6.10mm Width)
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
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Specifications

CY28346ZC-2 Technical Specifications
ParameterValue
Mounting typeSurface Mount
Voltage3.135V ~ 3.465V
Frequency200MHz
Operating temperature0°C ~ 85°C (TA)
PLLYes
InputCrystal
OutputHCSL, LVCMOS
PackageBulk
Main purposeIntel CPU Servers
Case56-TFSOP (0.240\", 6.10mm Width)
Number of circuits1
Ratio - Input:Output1:22
Differential - Input:OutputNo/Yes

Product details

What this clock chip does on a server board

The Cypress CY28346ZC-2 is a processor-specific PLL clock generator built for Intel CPU server platforms. It takes a single crystal input and fans it out across 22 outputs — a mix of HCSL and LVCMOS — at up to 200 MHz. That 1:22 ratio means one crystal feeds the whole clock tree: CPU reference clocks, PCIe, memory buffers, and chipset. No external fanout buffers needed on that side of the board.

Supply voltage and temperature — the operating window

Runs on a 3.135 V to 3.465 V supply. The 0°C to 85°C ambient range covers most server rooms and data-centre environments — not rated for extended industrial or outdoor use. If the board sits in an unconditioned telecom cabinet or a factory floor, this part is not the fit.

Differential input, single-ended input — what the pins expect

The input side is single-ended (crystal), but the outputs are differential HCSL. That differential-to-single-ended ratio is listed as No/Yes — meaning no differential inputs, but all outputs are differential-capable. For a server board that needs low-jitter HCSL clocks to the CPU and chipset, this matches. LVCMOS outputs are also available for slower peripherals, giving the designer one device for both clock domains.

Frequently asked questions

Does CY28346ZC-2 support HCSL and LVCMOS outputs simultaneously?

Yes, the output types are listed as HCSL and LVCMOS. The 1:22 fanout allows mixing both logic families across the 22 outputs, so one device can drive differential HCSL clocks to the CPU and single-ended LVCMOS clocks to peripherals.

Is CY28346ZC-2 compatible with Intel Xeon platforms?

The part's main purpose is listed as Intel CPU Servers, which covers Xeon-class platforms. Exact compatibility depends on the specific chipset and clocking requirements of your server generation — verify the output frequency plan and voltage levels against the platform clock specification.