133.33 MHz zero-delay buffer with 1:9 fanout
The CY2305ESXC-1HT is a zero-delay buffer from Infineon's 2305 series, built around a PLL with bypass that aligns output edges to the input clock while distributing to nine loads (1:9 ratio). Maximum output frequency is 133.33 MHz — enough for most DDR, Ethernet, or FPGA reference clocks in the 100–133 MHz range. Supply voltage spans 3V to 3.6V, so it runs cleanly off a 3.3V rail without an extra regulator.
8-SOIC footprint, commercial temp range
Housed in an 8-SOIC (0.154", 3.90mm width) — a standard 150-mil SOIC that routes easily on two-layer boards and fits most pick-and-place feeders without a nozzle change. Input and output are both single-ended clock signals; no differential pair needed, which simplifies layout on cost-sensitive designs.
Active production — no LTB on the horizon
ROHS3 compliant, so it passes the material declaration for EU and most global markets without an exemption expiry concern.