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Infineon Technologies CY23020LFI-3 — Clock & Timing ICs

CY23020LFI-3 Zero Delay Buffer, LVPECL, 400 MHz, 48-QFN

MPNCY23020LFI-3
End of Life

Cypress CY23020LFI-3 Zero Delay Buffer, PLL based clock driver, Input LVPECL, Output LVPECL, 400 MHz max, 2:10 fanout, 3.135V–3.465V supply, -40°C to 85°C, 48-VFQFN Exposed Pad, Surface Mount.

$7.42Ref. price · indicative, final on quote
Packaging48-VFQFN Exposed Pad
StockContact for availability
MOQ1 pcs
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Specifications

CY23020LFI-3 Technical Specifications
ParameterValue
TypeZero Delay Buffer
Mounting typeSurface Mount
Voltage3.135V ~ 3.465V
Frequency400 MHz
Operating temperature-40°C ~ 85°C (TA)
InputLVPECL
OutputLVPECL
PackageBulk
Case48-VFQFN Exposed Pad
Number of circuits1
Ratio - Input:Output2:10
Differential - Input:OutputYes/Yes

Product details

PLL-based clock driver for high-speed differential distribution

The Cypress CY23020LFI-3 is a PLL-based Zero Delay Buffer designed to regenerate and distribute a low-jitter LVPECL clock with deterministic phase alignment. It accepts one LVPECL input and fans it out to ten LVPECL outputs (2:10 ratio), all differential, all running up to 400 MHz. The part operates from a 3.135V to 3.465V supply and is specified over the industrial temperature range of -40°C to 85°C. It comes in a 48-VFQFN Exposed Pad package (48-QFN, 7x7 mm) for surface-mount assembly.

400 MHz ceiling and 2:10 fanout — what they mean for the clock tree

The 400 MHz maximum frequency covers most high-speed serial interfaces — Gigabit Ethernet, PCIe Gen 1/2 reference clocks, SONET/SDH, and FPGA transceiver reference clocks. The 2:10 ratio means one input drives five output banks of two differential pairs each; a single CY23020LFI-3 can feed ten LVPECL loads from one oscillator or synthesizer, reducing BOM count and board area versus discrete fanout trees. Because it is a PLL-based Zero Delay Buffer, the output edges are phase-aligned to the input — there is no cumulative skew across the fanout. This matters for parallel clock domains where setup/hold margins are tight.

Supply and temperature — design constraints

The supply range is 3.135V to 3.465V — a tight 3.3V ±5% window. The PLL's loop filter and VCO are sensitive to supply noise; a clean, well-decoupled 3.3V rail is required. The industrial temperature range (-40°C to 85°C) qualifies this part for outdoor telecom base stations, industrial motor drives, and automotive cabin electronics (though it is not AEC-Q100 qualified).

RoHS status — compliance check

The CY23020LFI-3 is marked RoHS non-compliant. This is a hard constraint for any BOM that must meet RoHS or similar environmental directives. If your design requires RoHS compliance, you will need to look at a different part number in the family or a lead-free alternative.

Lifecycle and sourcing

It is sourced through independent distribution and quoted to order against an RFQ.

Frequently asked questions

Is CY23020LFI-3 RoHS compliant?

No, the CY23020LFI-3 is listed as RoHS non-compliant. It cannot be used in designs that require RoHS compliance.

What is the operating frequency range of CY23020LFI-3?

The CY23020LFI-3 supports a maximum frequency of 400 MHz on both input and output.