Dual-frequency clock generator — 200 MHz CMOS, 400 MHz PECL
The CY22394FXC is a single-chip clock generator and fanout buffer from Infineon that produces both a 200 MHz CMOS output and a 400 MHz PECL output from a single LVTTL or crystal input. The integrated PLL includes a bypass mode, letting you feed the reference clock straight through for system debug or low-jitter bypass operation — a feature that saves an external mux on the board. With a 1:5 input-to-output ratio, one reference clock fans out to five independent clock domains; the differential PECL pair on outputs 4 and 5 can drive a high-speed SerDes or FPGA reference without an external level translator.
If your board runs a 3.0 V or 2.5 V rail, this part needs its own LDO; the CY2305SXI-1HT peer runs on 3.0 V nominal and might fit a lower-voltage rail without an extra regulator. The commercial temperature grade (0°C to 70°C) limits this part to indoor, office, or appliance environments.
Active production — ROHS3, 16-TSSOP package
Supplied in Tube and mounted in a 16-TSSOP package with 0.65 mm pitch. The 0.65 mm pitch is manageable on a two-layer board with careful fan-out; the narrow body (4.40 mm width) saves board edge compared to a SOIC-16. Submit an RFQ for the exact quantity and target lead time.