NVSRAM that keeps data without a battery
The Infineon CY14B108N-ZSP45XI is an 8 Mbit non-volatile SRAM (NVSRAM) organized as 512K x 16, with a parallel interface and a 45 ns access time. It combines the read/write speed of SRAM with on-chip non-volatile storage, so it retains data through power loss without an external battery backup.
For a 16-bit controller running at 20 MHz to 33 MHz, this typically allows zero-wait-state reads if the controller's memory interface timing closes within that window. At higher bus speeds (above 40 MHz) you will likely need a single wait state, so check the controller's tACC requirement against the 45 ns spec before committing the layout.
No battery, no worry — the NVSRAM advantage
Standard SRAM loses data when power drops, forcing designers to add a battery or supercapacitor and a power-fail detection circuit. The CY14B108N-ZSP45XI eliminates that: its internal non-volatile elements store the SRAM array on power-down and restore it on power-up, all within the same 45 ns access cycle. That saves board space, removes battery-replacement maintenance, and improves reliability in remote or sealed enclosures.
It comes in a 54-TSOP II surface-mount package (10.16 mm body width).
Supply range and write timing
The write cycle time (word or page) is also 45 ns, so read and write cycles run at the same speed — no asymmetric penalty when updating configuration tables or logging data.