Pre-biased PNP — one component, two resistors saved
It integrates a 47 kΩ base resistor (R1) and a 22 kΩ emitter-base resistor (R2), which eliminates two external passives from the BOM and shrinks the footprint for dense SMT layouts. Collector-emitter breakdown is rated at 50 V, maximum collector current at 70 mA, and the device dissipates up to 250 mW. With a transition frequency of 150 MHz, it handles small-signal switching and interface-level shifting in 3.3 V to 24 V systems — think relay coils, LED indicators, or logic-level translation where a single PNP stage with built-in bias cleans up the board.
50 V breakdown, 70 mA collector — where the envelope lands
The 50 V Vce(max) and 70 mA Ic(max) define the safe operating area for low-current switching and linear applications. DC current gain minimum is 50 at 5 mA, 5 V — adequate for driving loads from a microcontroller GPIO through the integrated base resistor. Off-state collector cutoff is 100 nA max, so leakage won't load a high-impedance node in standby.
For procurement, that removes the urgency of a last-time-buy calculation and supports multi-year production commitments.