Dual PNP pre-biased pair — 50 V, 100 mA, SOT-23
The Infineon BCR129SE6327 packs two PNP transistors with integrated bias resistors into a single SOT-23-3 package. Each transistor has a built-in 10 kΩ base resistor (R1), eliminating two external resistors per channel and cutting placement cost. Rated for 50 V collector-emitter breakdown and 100 mA continuous collector current, it handles low-power switching, level translation, and interface loads in compact designs. The 150 MHz transition frequency keeps switching clean for common logic and signal rates.
The 250 mW power limit splits between both transistors. In a typical 5 V pull-up application at 10 mA per side, each transistor dissipates about 50 mW, leaving headroom. Push past 15 mA per side continuous in free air, and you're close to the limit — thermal derating applies above 25 °C ambient. For the SOT-23 footprint, that means keeping the load current under 20 mA per transistor unless the board has good airflow or copper-plane heat sinking.
Saturation voltage — 300 mV at 500 µA base drive
Vce(sat) maxes at 300 mV with 500 µA base current and 10 mA collector load — typical for pre-biased parts. That means the output doesn't pull cleanly to ground under heavy load; for 3.3 V logic interfacing, the low-level output stays under 0.4 V, which is fine for most CMOS inputs. If you need a tighter saturation voltage below 100 mV, you'll want a standard transistor with a higher base-drive ratio.
