2MB PSRAM + 320KB SRAM memory map
The ESP32-S2R2 integrates 2MB PSRAM for heap expansion, 320KB on-chip SRAM for code and data, and 128KB ROM for boot routines — the PSRAM sits on a separate bus, so cache misses do not stall the CPU pipeline. For a WiFi stack with TLS and a small RTOS, the 320KB SRAM holds the active task contexts and network buffers; the PSRAM serves as backing store for large JSON payloads or framebuffers.
802.11b/g/n at 2.4GHz — 150Mbps PHY
The radio supports 802.11b/g/n on 2.4GHz with a 150Mbps PHY data rate — single-stream HT20/HT40 modes, no MIMO. The 19.5dBm transmit power gives roughly +3dB link margin over typical 16dBm WiFi chips, useful in enclosures with plastic or metal attenuation. Receiver sensitivity is -97dBm at the lowest data rate — this sets the noise floor for the clear-channel assessment threshold in dense AP environments.
Interface set and supply rail
Serial interfaces include USB OTG, SPI, I²C, I²S, UART, PWM, ADC, and GPIO — the USB peripheral handles direct programming and CDC-ACM virtual COM port without an external UART bridge. Supply voltage range is 2.8V to 3.6V on a single rail — the internal LDOs generate the 1.1V core and 1.8V I/O from this input.
Current consumption profile
Receive current draws 63mA to 68mA; transmit current ranges from 160mA at lower power settings to 310mA at 19.5dBm output — the delta is the PA bias current, so a 3.3V rail feeding this chip should budget 350mA peak with 100mV headroom to avoid brownout during WiFi bursts.