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Atmel ATF22V10CQZ-20SI — FPGA / CPLD & Programmable Logic

Atmel ATF22V10CQZ-20SI CPLD, 20 ns, 10 Macrocells, 24-SOIC

MPNATF22V10CQZ-20SI
Obsolete

Atmel 22V10 series EE PLD, ATF22V10CQZ-20SI, 20 ns speed, 10 macrocells, 5V input, 24-SOIC surface mount, tube packaging.

$2.3500Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

ATF22V10CQZ-20SI specifications
ParameterValue
Series22V10
MountingSurface Mount
Programmable typeEE PLD
Voltage - input5V
Speed20 ns
PackageTube
Case24-SOIC (0.295\", 7.50mm Width)
Number of macrocells10

Product details

The ATF22V10CQZ-20SI is officially obsolete per Atmel's lifecycle status.

20 ns speed — 10 macrocells — 5V EE PLD

This is an electrically erasable programmable logic device (EE PLD) from the 22V10 series, delivering a propagation delay of 20 ns. The 10 macrocells provide the logic fabric for glue-logic integration, state machines, or address decoding in 5V systems. The 20 ns speed means the combinatorial output settles within 20 ns of the input transition — this sets the maximum system clock rate the part can support without pipeline stages. The 5V-only supply rail is typical of legacy 5V logic families — no core or I/O voltage translation is needed when interfacing with 5V TTL or CMOS peripherals.

Frequently asked questions

What is the ATF22V10CQZ-20SI's speed grade?

The listed propagation delay is 20 ns. This is the pin-to-pin delay through the logic array — the maximum clock frequency the device can sustain in registered mode is approximately 50 MHz, though the actual ceiling depends on the logic path and output loading.

How many macrocells does the ATF22V10CQZ-20SI have?

It contains 10 macrocells. Each macrocell includes a flip-flop and programmable output polarity, configurable as registered or combinatorial. The 22V10 architecture is a classic PAL-like block — the 10 macrocells map to 10 dedicated I/O pins.