Supervisor with battery switchover — what it does on the board
It monitors a 3.075 V threshold rail and asserts an active-low, push-pull reset when the supply drops below that level, holding reset for a minimum of 35 ms after the rail recovers. The battery-backup circuit automatically switches a CMOS RAM, RTC, or SRAM to a backup cell when the primary supply falls out of regulation — no external switching FET needed. The push-pull output drives the reset line directly without an external pull-up resistor, saving one BOM line on dense boards.
35 ms reset timeout — why that window matters
The 35 ms minimum reset timeout is the guaranteed hold time after VCC crosses the 3.075 V threshold on the way up. For a microcontroller booting from Flash, 35 ms is ample; for a fast FPGA configuration load, it is still comfortable headroom. If your design uses a slower power supply ramp or a large bulk capacitor on the rail, the timeout stays fixed — it does not stretch with the ramp rate.