12-bit SAR ADC with a 73k sample rate ceiling
The MAX1240AESA+ is a 12-bit successive-approximation register (SAR) ADC that samples a single-ended input at 73,000 samples per second (73k SPS). The SAR architecture gives you a deterministic conversion time — no pipeline delay, so the sample you request is the sample you get, cycle after cycle. No separate AVDD and DVDD rails to route. The SPI-compatible serial interface (Data Interface: SPI) talks directly to most microcontrollers without glue logic. The conversion result shifts out on SCLK edges; the host reads it over three wires (SCLK, CS, DOUT).
Industrial temperature range and SOIC package
The 1.27 mm pin pitch leaves room for a guard ring around the analog input if you need it.
Active production and compliance status
The reference type is selectable: use the internal 2.5 V bandgap for a stand-alone design, or drive REF with an external precision reference when you need tighter absolute accuracy across temperature.