130ms timeout — sizing the hold-off
Most MCUs need between 1ms and 100ms for their internal PLL and regulator to settle, so 130ms provides margin across a range of devices. If your processor has a fast-starting internal oscillator and a small bypass cap, the 130ms hold-off is generous — it will not cause a boot delay issue. If you are chaining multiple supervisors or using a watchdog that expects a shorter reset pulse, verify the timing budget against the processor's minimum reset pulse width requirement.
