10-bit R-2R DAC with 160 ns settling
The AD5432YRMZ is a 10-bit multiplying DAC built on a classical R-2R ladder architecture, delivering a current-unbuffered differential output. Settling time is 160 ns to within 1 LSB, which means the output settles fast enough for waveform generation or closed-loop control loops updating at several MHz — the 160 ns figure is the time from the last clock edge to the analog output reaching its final value, not the SPI bus cycle time. The digital interface is SPI and DSP-compatible, so it talks directly to most microcontrollers and DSPs without glue logic. Reference type is external, giving the designer control over the full-scale output range by picking the reference voltage.
Linearity and supply rails
Integral nonlinearity is ±0.5 LSB max, differential nonlinearity is ±1 LSB max — these are the numbers that tell you whether the DAC's transfer curve stays monotonic and where the code-to-code step error lands. For a 10-bit part, ±0.5 LSB INL means the output at any code is within half a least-significant bit of the ideal straight line, which is tight enough for most control and trimming applications. The dual supply lets the analog core and the digital interface each draw from their own regulator, which helps keep switching noise off the analog output. That 125°C ceiling means the part survives inside an enclosure next to a hot power supply or on a board in an engine bay without derating the output specs.
The supplier device package is 10-MSOP — the same footprint as the standard MSOP-10. Tube delivery, so it comes in a stick for pick-and-place or bench prototyping.