Clock source — 120 MHz MEMS oscillator
The ASEMPC-120.000MHZ-T3: ±50ppm frequency stability across the full operating range is the spec that governs whether this part works for your timing budget. At 120 MHz, ±50ppm represents an absolute frequency error of ±6 kHz — fine for digital logic clocks and most MCU PLLs, but worth checking against any precision-timed bus (PCIe reference clocks, for instance, tighten to ±300ppm or tighter depending on the spec revision). The MEMS resonator delivers this stability without the crystal's AT-cut angle sensitivity to board flex.
Supply rail and power architecture
The part draws up to 35 mA when oscillating and drops to 26 mA in disable mode. The enable/disable pin lets the firmware gate the clock during low-power states — a full oscillator shutdown saves the delta between those two current figures versus leaving it running continuously.
Package and placement
Tape-and-reel packaging is standard for high-volume SMT assembly. The no-lead format means coplanarity is not a concern the way it is with a gull-wing part — but verify the paste mask footprint before committing to a new board spin.
Sourcing — active, quoted to order
No official second-source or successor order code is listed for this specific part.