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Toshiba Semiconductor TAR5S35U(TE85L,F) — Power Management (PMIC / Gate Driver)

TAR5S35U(TE85L,F) LDO Regulator, 3.5V Fixed Output, 200mA

MPNTAR5S35U(TE85L,F)
End of Life

Toshiba TAR5S35U(TE85L,F) linear voltage regulator, fixed 3.5V output, 200mA, PSRR 70dB (1kHz), dropout 0.2V max at 50mA, -40°C to 85°C, 6-SMD flat-lead UFV package.

$0.49Ref. price · indicative, final on quote
Packaging6-SMD (5 Leads), Flat Lead
RoHSRoHS non-compliant
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

TAR5S35U(TE85L,F) specifications
ParameterValue
Output typeFixed
MountingSurface Mount
Voltage - input15V
Voltage dropout0.2V @ 50mA
Voltage - output (Min (Fixed))3.5V
Output current200mA
Current - supply850 µA
Operating temperature-40°C ~ 85°C
PSRR70dB (1kHz)
PackageTape & Reel (TR); Cut Tape (CT)
Case6-SMD (5 Leads), Flat Lead
Control featuresEnable
Protection featuresOver Current, Over Temperature
Number of regulators1
Output configurationPositive

Product details

Fixed 3.5V rail with 70dB PSRR — the noise-sensitive supply choice

The Toshiba TAR5S35U(TE85L,F) is a single-output positive fixed linear regulator delivering 3.5V at up to 200mA. Its PSRR of 70dB at 1kHz makes it a strong candidate for powering analog front-ends, reference buffers, or VCO supply rails where keeping supply ripple off the signal path matters. The 0.2V maximum dropout at 50mA means the input rail can sit as low as 3.7V and still hold regulation — useful when the pre-regulator is itself a switching converter with some load-transient droop.

Dropout and headroom — what 0.2V at 50mA buys the BOM

The 0.2V max dropout at 50mA sets the minimum input-to-output differential. For a 3.5V output rail, a 3.7V input is the floor; anything lower and the regulator drops out. At the full 200mA load the dropout will be higher — the 0.2V figure is a 50mA condition — so budget at least 0.5V headroom for the full current range. The 850 µA maximum supply current (quiescent plus dropout) keeps the efficiency penalty small in always-on subsystems.

UFV package — footprint and thermal reality

Housed in a 6-SMD (5 leads) flat-lead package with the UFV supplier designation, this part is a surface-mount device intended for reflow assembly. The five-lead layout with an exposed pad (typical for this class) pulls heat into the PCB copper plane. At 200mA with 0.5V dropout the dissipation is 100mW — well within the package capability with standard 1oz copper pours.

Protection and control — Enable pin and built-in safeguards

An Enable pin allows the output to be gated by a logic signal, useful for sequencing multiple rails or shutting down a peripheral in sleep mode. Over-current and over-temperature protection are integrated — the regulator folds back or shuts off rather than letting the die exceed the SOA. No external pass transistor or protection diode is needed for normal operation.

Current production — sourcing posture

Frequently asked questions

What is the PSRR of the TAR5S35U?

The listed PSRR is 70dB at 1kHz. That is a solid figure for a linear regulator in this current class — it means supply ripple at 1kHz is attenuated by a factor of about 3160, which keeps the output clean enough for most 12-bit or 14-bit analog circuits.

Does TAR5S35U require an output capacitor?

The evidence does not specify a minimum output capacitance requirement. A typical LDO of this class needs a 1µF to 10µF ceramic on the output for stability — the datasheet should be consulted for the exact value and ESR range. The Enable pin and protection features are confirmed on the record.