Dual PNP pre-biased pair in SOT-353
The RN2710,LF integrates two PNP transistors with built-in base resistors (R1 = 4.7 kΩ each) in a single SOT-353 package, eliminating two external resistor placements per channel. This is a bias resistor transistor (BRT) — the integrated resistor network sets the base drive, so the design saves PCB area and reduces pick-and-place cost compared to a discrete transistor-plus-resistor pair.
Collector-emitter breakdown is 50 V minimum, and continuous collector current is rated 100 mA. These are the hard ceilings for the load — stay below 80 mA and 40 V for derated margin in a 25 °C ambient. The 200 mW power dissipation is the total for both transistors; in a dense SOT-353 layout with limited copper, the thermal budget is the binding constraint, not the current rating. This is typical for a pre-biased PNP — the integrated base resistor limits the available base current, so the gain figure is lower than a discrete PNP of the same die size. Saturation voltage is 300 mV maximum at Ib = 250 µA, Ic = 5 mA, which keeps conduction loss low in switched loads like relay coils or indicator LEDs.
Active production, ROHS3, tape-and-reel ready
ROHS3 compliant.