Single 2-input NAND gate in a 5-pin SOT-353
The Toshiba 7UL1G00FU,LF is a single 2-input NAND gate in a tiny 5-pin SOT-353 package (also listed as 5-TSSOP / SC-70-5). The 1 µA quiescent current keeps the idle draw negligible.
4.4 ns propagation delay — fast enough for most glue logic
With a maximum propagation delay of 4.4 ns at 3.3 V with a 30 pF load, this gate handles clock gating, signal inversion, and enable decoding without adding a timing hazard. The 8 mA output drive (both high and low) is enough to fan out to a few CMOS loads or drive a short PCB trace.
The input logic thresholds scale with supply: low at 0.7V–0.8V, high at 1.7V–2V, so it cleanly interfaces with 1.8V and 3.3V logic families without extra level translation.
For a simple gate that fills a BOM line for years, this is the preferred lifecycle posture.