150 MHz dual D-type with set/reset — the 74LCX74FT
The Toshiba 74LCX74FT is a dual D-type flip-flop from the 74LCX low-voltage CMOS family, clocked at 150 MHz with positive-edge triggering and independent Set (Preset) and Reset inputs per element. Each of the two flip-flops stores one bit and drives complementary outputs, sinking or sourcing 24 mA per output — enough to drive a downstream logic input or a low-power LED indicator without a buffer.
Timing and drive — what the 7 ns delay means on the bench
Input capacitance is 7 pF typical — a light load on the driving stage, but in a high-fanout clock tree the cumulative capacitance of multiple 74LCX74FT inputs still needs a clock buffer rated for the total load.
