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Toshiba Semiconductor 74LCX573FT — Discrete Semiconductors

Toshiba 74LCX573FT D-Type Latch, 8-Bit Tri-State, 20-TSSOP

MPN74LCX573FT
End of Life

Toshiba Semiconductor 74LCX series D-Type Latch, 74LCX573FT, 8:8 circuit, Tri-State output, Surface Mount 20-TSSOP, 1.65V ~ 3.6V supply, 8ns propagation delay, 24mA output current.

$0.58Ref. price · indicative, final on quote
Toshiba Semiconductor 74LCX573FT datasheet (PDF)
Packaging20-TSSOP (0.173", 4.40mm Width)
RoHSRoHS Compliant
Series74LCX
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

74LCX573FT specifications
ParameterValue
Series74LCX
Logic typeD-Type Latch
Output typeTri-State
MountingSurface Mount
Voltage1.65V ~ 3.6V
Current - output high, low24mA, 24mA
Operating temperature-40°C ~ 85°C (TA)
Circuit8:8
PackageTape & Reel (TR); Cut Tape (CT)
Case20-TSSOP (0.173\", 4.40mm Width)
Independent circuits1
Delay time - propagation8ns

Product details

What is the 74LCX573FT and what does it do?

The 74LCX573FT is an 8-bit D-type latch from Toshiba's 74LCX series, designed for low-voltage logic systems. It stores data on the D inputs when the latch enable (LE) is high, and the tri-state outputs let multiple devices share a bus without contention. The 8ns propagation delay keeps up with moderate-speed buses, and the 24mA source/sink drive can directly feed a handful of CMOS inputs or a low-power LED indicator without a buffer.

The supplier device package is 20-TSSOPB, which is the standard Toshiba footprint for this body size.

Frequently asked questions

How does the 74LCX573FT compare to the 74LCX373FT?

The 74LCX373FT is a D-type transparent latch, meaning the outputs follow the inputs while the latch enable is high. The 74LCX573FT is a D-type latch with a different internal architecture — it stores the input state on the rising edge of the latch enable. Both are 8-bit, tri-state, and share the same 1.65V-3.6V supply and 24mA drive, but the 573FT's edge-triggered behavior is better for synchronous bus applications where you want to capture data at a specific clock edge rather than let it flow through.

What is the 74LCX573FT's circuit configuration?

It is an 8:8 circuit — eight data inputs and eight outputs, with one independent latch circuit. The tri-state outputs are controlled by a single output enable pin, letting you connect the outputs to a shared bus and disable them when another device drives the line.