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Texas Instruments TPS7A6601QDGNRQ1 — Analog & Data Acquisition

TI TPS7A6601QDGNRQ1 LDO Regulator, 150mA, AEC-Q100

MPNTPS7A6601QDGNRQ1
End of Life

Texas Instruments TPS7A6601QDGNRQ1, automotive-grade adjustable LDO regulator, 150 mA output, 40 V max input, 20 µA quiescent current, PSRR 60 dB ~ 40 dB (100 Hz ~ 100 kHz), 8-HVSSOP package, -40°C to 150°C junction.

$1.74Ref. price · indicative, final on quote
Packaging8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TPS7A6601QDGNRQ1 specifications
ParameterValue
Output typeAdjustable
MountingSurface Mount
Voltage - input40V
Voltage dropout0.45V @ 150mA
Voltage - output5V
Voltage - output (Min (Fixed))1.5V
Output current150mA
Current - quiescent20 µA
Operating temperature-40°C ~ 150°C (TJ)
PSRR60dB ~ 40dB (100Hz ~ 100kHz)
GradeAutomotive
PackageTape & Reel (TR); Cut Tape (CT)
QualificationAEC-Q100
Case8-TSSOP, 8-MSOP (0.118\", 3.00mm Width) Exposed Pad
Control featuresEnable, Power Good
Protection featuresOver Current, Over Temperature, Short Circuit, Under Voltage Lockout (UVLO), Watchdog
Number of regulators1
Output configurationPositive

Product details

40 V input LDO for automotive always-on and post-buck rails

The Texas Instruments TPS7A6601QDGNRQ1 is an adjustable-output, positive-voltage LDO regulator rated for 150 mA output current and a 40 V maximum input.

PSRR across frequency — what 60 dB to 40 dB means for a clean rail

The PSRR is specified at 60 dB at 100 Hz, dropping to 40 dB at 100 kHz. This profile is typical for an LDO with moderate loop gain; the 60 dB at low frequencies handles 100 Hz / 120 Hz ripple from a rectified input or a switching pre-regulator's fundamental, while the 40 dB at 100 kHz still provides meaningful attenuation of the first few harmonics of a 400 kHz to 2 MHz buck converter. For a 3.3 V analog supply rail fed from a 5 V switching regulator, this PSRR range is sufficient to keep ripple below 1 mVpp if the input ripple is under 100 mVpp. The dropout voltage is 0.45 V maximum at 150 mA, so a 5 V input holds a 3.3 V output with margin even through cold-crank dips to 4.5 V.

Protection suite and control features

The TPS7A6601QDGNRQ1 integrates over-current, over-temperature, short-circuit, and under-voltage lockout (UVLO) protection, plus a watchdog monitor on the enable pin. The Power Good output provides a sequenced-rail flag for an MCU or FPGA power-on reset. The Enable pin allows the rail to be gated by a system supervisor. For a safety-critical ECU rail, this protection set reduces external supervisory IC count.

Package, thermal, and mounting

The 8-HVSSOP package (3.00 mm × 3.00 mm body) with an exposed thermal pad is the key to keeping junction temperature under the 150°C limit at full load in a 105°C ambient. The part is surface-mount only, and the tape-and-reel or cut-tape options suit both prototyping and production reels.

No NRND or last-time-buy notice is on the public record for this part. The AEC-Q100 qualification is documented; the part is listed under the automotive-grade category.

Frequently asked questions

Will TPS7A6601QDGNRQ1 drop into a panel specified around TPS7A0313PDBVR without rewiring?

No, the TPS7A0313PDBVR is a fixed-output 1.3 V LDO with a 6.0 V maximum input and a different pinout and package (SOT-23-5). The TPS7A6601QDGNRQ1 is an adjustable-output device in an 8-HVSSOP with a 40 V input rating. They are not pin-compatible and serve different supply-voltage domains. A board designed for the TPS7A0313 would require layout changes to accommodate the TPS7A6601QDGNRQ1.

What is the TPS7A6601QDGNRQ1's PSRR at 100 Hz and 100 kHz?

The PSRR is specified as 60 dB at 100 Hz and 40 dB at 100 kHz. This provides strong rejection of low-frequency ripple and moderate attenuation of switching-converter harmonics up to 100 kHz.