Dual CMOS op-amp for fast, precise signal chains
The 2 pA input bias current suits high-impedance sensor interfaces — photodiode transimpedance stages or pH probe buffers — without adding offset from bias current. Supply current is 330 µA per amplifier, keeping the power budget under control in multi-channel designs.
The 15 V/µs slew rate supports full-power bandwidth up to roughly 480 kHz at 5 V output swing. For a 5 MHz small-signal bandwidth, the amplifier can handle fast pulse trains or ADC driver applications where settling time matters. The rail-to-rail output stage maintains swing into 50 mA loads per channel, useful for driving lower-impedance ADC inputs or cable terminations without an extra buffer.
Temperature range and operating environment
The input offset voltage is 330 µV maximum, which is typical for a general-purpose CMOS amplifier at this speed grade — adequate for 8- to 10-bit signal chains without trimming.
Lifecycle and supply posture
ROHS3 compliant. For new designs, there is no LTB risk to budget.