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TLV5626CD

TI TLV5626CD 8-bit dual DAC, 5.5µs settling, SOIC-8

MPNTLV5626CD
End of Life

Texas Instruments TLV5626CD, 8-bit dual voltage-output DAC, String DAC architecture, 5.5µs settling, SPI interface, 2.7V–5V supply, 8-SOIC package, 0°C to 70°C.

$7.01Ref. price · indicative, final on quote
Packaging8-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

TLV5626CD specifications
ParameterValue
Output typeVoltage - Buffered
MountingSurface Mount
Reference typeExternal, Internal
Voltage - supply, analog2.7V ~ 3.3V, 5V
Voltage - supply, digital2.7V ~ 3.3V, 5V
Data interfaceSPI
Operating temperature0°C ~ 70°C
PackageTube
ArchitectureString DAC
INL (DNL)±0.4, ±0.1
Settling time5.5µs
Number of bits8
Case8-SOIC (0.154\", 3.90mm Width)
Differential outputNo
Number of d (A converters)2

Product details

Both the analog and digital supply pins accept 2.7 V to 5 V, so you can power the whole DAC from a single 3.3 V or 5 V rail without a separate analog regulator. That simplifies the power tree on a mixed-signal board, but watch the reference: the part accepts either an external or internal reference, and the output swing depends on the reference voltage you feed it. If you need a rail-to-rail output, this part won't give it — the voltage output is buffered but not rail-to-rail, so check the output compliance against your ADC input range.

Linearity and monotonicity — INL ±0.4 LSB, DNL ±0.1 LSB

The INL of ±0.4 LSB and DNL of ±0.1 LSB mean the part is guaranteed monotonic — every digital code step produces a positive voltage increment. For a trim DAC, that matters: you don't want a code that jumps backward. The DNL figure is tight enough that you won't see missing codes in the transfer curve. If you're using this to set a comparator threshold or a regulator feedback voltage, that linearity buys you repeatable setpoints across temperature.

That rules out automotive under-hood, outdoor telecom cabinets, or any environment that sees freezing or sustained heat above 70°C.

No stock figures here, but the supply channel is open.

Frequently asked questions

What is the settling time of TLV5626CD?

The settling time is 5.5 µs to within 1 LSB for a full-scale step. That translates to a maximum update rate of about 180 kSPS per channel, assuming the SPI bus can feed data that fast.

What are the equivalent parts to TLV5626CD?

The DAC7750IPWP is a different class of part — 12-bit, current output, single channel, wider supply range, and industrial temperature. It is not a pin-compatible or functional equivalent. For a direct replacement, look at the TLV5626ID (industrial temperature range) or other 8-bit dual voltage-output DACs in SOIC-8 from TI or compatible second sources.

What is the output type of TLV5626CD?

The output type is voltage-buffered. Each of the two DAC channels drives a buffered voltage output, not a current loop or un-buffered capacitor-driving output.