Octal buffer for mixed-voltage buses
The Texas Instruments SN74LVCH244APWT is an octal (dual 4-bit) non-inverting buffer with 3-state outputs in a 20-TSSOP package. Each output can sink or source 24 mA, enough to drive a lightly loaded bus or a handful of CMOS inputs without an extra line driver. The 3-state outputs let you share a data bus across multiple peripherals by pulling the output-enable pins high.
Supply range — why 1.65V to 3.6V matters
The 1.65V to 3.6V supply window covers the three most common low-voltage logic rails: 1.8V, 2.5V, and 3.3V. If your design has a 2.5V FPGA bank talking to a 3.3V peripheral, this buffer sits between them without a level translator — the input thresholds track the supply. At 1.8V the 24 mA drive drops, but the part still switches cleanly.
Rated for 24 mA high and low at 3.3V, the outputs can drive a 50 pF load at the rated speed without visible edge degradation. That 24 mA figure is the DC limit — for short bus stubs or point-to-point signals it leaves margin. If you are fanning out to more than four or five CMOS loads, add a series resistor to damp reflections; the 3-state control makes it easy to disconnect the bus when the buffer is not selected.
For production builds, the 20-TSSOP package is widely second-sourced across the 74LVCH family — if you need a dual-sourcing hedge, the same function in a different package (e.g., 20-SOIC) is a straightforward board spin.