Dual D-type flip-flop with set and reset — 150 MHz, 1.65 V to 3.6 V supply
The Texas Instruments SN74LVC74ADT is a dual positive-edge-triggered D-type flip-flop with individual set (preset) and reset inputs, packaged in a 14-SOIC. Each of the two elements stores one bit, with complementary outputs (Q and Q̅). It operates from a 1.65 V to 3.6 V supply. The 150 MHz maximum clock frequency supports moderate-speed data path and control register applications. With a 24 mA source and sink output drive, it can fan out to multiple CMOS or TTL loads without external buffers.
Temperature grade and environment
Rated for -40°C to 125°C ambient operation, this flip-flop suits industrial control, automotive under-hood, and outdoor telecom equipment where the board sees temperature extremes. The 74LVC family's low quiescent current — 10 µA typical — keeps the power budget tight in always-on or battery-backed domains.
Timing and drive — what the numbers mean for the bus
The 5.2 ns maximum propagation delay at 3.3 V with a 50 pF load sets the timing budget for clock-to-Q in a synchronous design. The 24 mA output drive is enough to drive short PCB traces or multiple gate inputs; for longer backplane runs, buffer the output.
Package and footprint
Housed in a 14-SOIC (0.154", 3.90 mm width) surface-mount package, the SN74LVC74ADT occupies a standard footprint shared across the 74LVC and 74AHCT families. The supplier device package is also 14-SOIC.
Lifecycle and sourcing
TI lists the SN74LVC74ADT as Active and ROHS3 compliant. No last-time-buy or obsolescence notice is in effect.