Dual 4-input NAND gate in 14-TSSOP
The SN74LV20APWR is a dual 4-input NAND gate from the 74LV series by Texas Instruments. The 14-TSSOP package saves board area compared to a SOIC-14, but the 0.65mm pitch means the layout engineer should budget for a 4-layer board if routing density is high.
7ns propagation delay at 5V
Maximum propagation delay is 7ns at 5V with a 50pF load. That is fast enough for control-path decode and data gating in most 20-50 MHz bus systems. The 12mA output drive on both high and low edges gives clean edges into a moderate fan-out of 5-10 LVCMOS loads. Input logic thresholds are 0.5V low and 1.5V high at 5V supply — compatible with standard 3.3V logic outputs as well, since the low threshold is well below 0.8V. The 20 µA quiescent current keeps the power budget negligible in battery-powered or always-on subsystems.
Active lifecycle, ROHS3 compliant
It is ROHS3 compliant.
