Single-gate NAND with a wide supply range — the level-shifting workhorse
The input logic thresholds scale with VCC: low-level at 0.58V to 0.8V, high-level at 0.94V to 2.1V, so the gate correctly interprets signals from 1.8V, 2.5V, 3.3V, and 5V domains without external bias resistors.
7 ns propagation delay — timing budget for mixed-voltage buses
Maximum propagation delay is 7 ns at 5V with a 30 pF load. At lower supply voltages the delay increases, so budget extra margin when running at 1.8V or 2.5V. The 8 mA output drive is enough for one or two CMOS fan-outs or a short PCB trace; for longer runs or heavier loads, buffer the output or pick a gate with higher drive.
The 74LV series is a mature logic family with broad second-sourcing options — the SN74AHC1G00DBVT (74AHC series, 2V to 5.5V, 7.5 ns at 5V) is a functional peer for dual-sourcing qualification, though verify input threshold compatibility at your operating voltage.
The quiescent current is a maximum 10 µA across the temperature range, so it adds negligible draw in battery-powered or always-on circuits.