Triple 3-input NAND gate for 2V to 5.5V logic rails
The Texas Instruments SN74LV10ANSR is a triple 3-input NAND gate from the 74LV low-voltage logic family. It integrates three independent NAND gates, each with three inputs, in a single 14-SOIC package. The part operates across a 2V to 5.5V supply range, making it a direct fit for mixed-voltage boards where a 3.3V core logic domain needs to interface with 5V-tolerant peripherals or a 2.5V I/O bank. The 74LV series is designed for low-power battery-backed or power-sensitive industrial logic, with a maximum quiescent current of 20 µA across the full temperature range.
7.9 ns propagation delay — timing budget for bus-level logic
The maximum propagation delay is 7.9 ns at 5V with a 50 pF load. This sets the timing closure floor for address decoding, control signal gating, or clock distribution where the gate sits in the critical path. At lower supply voltages the delay increases, so a 3.3V rail design should budget roughly 12-15 ns per gate for worst-case timing analysis. The 12 mA symmetric output drive at both high and low levels is enough to drive a short PCB trace or a single fan-out to another 74LV input without a buffer.
Industrial temperature grade and surface-mount footprint
Rated for -40°C to 85°C operating temperature, the SN74LV10ANSR suits outdoor telecom cabinets, factory-floor PLC I/O modules, and automotive cabin electronics that see under-hood ambient but not direct engine-bay heat. The 14-SOIC package (0.209" body width, 5.30 mm) is a standard footprint shared across the 74LV logic family, so a board layout for this gate also accepts the 74LV00 quad 2-input NAND or the 74LV08 quad 2-input AND without a respin. The supplier device package is 14-SO.
Active lifecycle and ROHS3 compliance — no LTB risk
The SN74LV10ANSR carries an active product status with ROHS3 compliance. For a production BOM this means no forced redesign cycle from obsolescence in the near term.