The Texas Instruments SN74LS03N packs four independent 2-input NAND gates in a single 14-pin DIP, each with an open-collector output. Open collector means the output transistor pulls low to ground but floats high — the pull-up resistor is external. Supply range is 4.75 V to 5.25 V, squarely a 5 V TTL part. Input low threshold is 0.8 V, high threshold is 2 V — standard 74LS levels.
Propagation delay and drive — sizing the pull-up and the bus
Maximum propagation delay is 32 ns at 5 V with a 15 pF load. That is typical for the 74LS family — adequate for slow address decoding, status latching, or glue logic running below 10 MHz. For comparison, the 74F family (e.g., SN74F00DR) delivers 5 ns at 5 V / 50 pF, but that part is surface-mount and lacks open-collector outputs. If your board needs the speed, the 74F is a different footprint and logic style; the 74LS03N is the right choice when open-collector wired-OR or level shifting is the requirement, not raw clock distribution. Output drive is asymmetric: 250 µA sourced high (since the open-collector transistor is off), and 16 mA sunk low. The sink current is the real spec — size the external pull-up resistor so the output low voltage stays within the logic-low threshold of the receiving gate. A 1 kΩ pull-up to 5 V gives about 5 mA sink current, well within the 16 mA limit, and keeps the rise time reasonable for the 32 ns propagation delay budget.
This is a standard catalog item for Texas Instruments' 74LS series, widely stocked across franchised and independent distribution. The 14-DIP package is through-hole, which means hand-assembly or wave-solder friendly — no reflow profile concerns, no MSL bake requirements out of the tube.