Dual JK flip-flop with preset and clear — 16-pin DIP
The Texas Instruments SN74HC109N is a dual JK flip-flop from the 74HC family, each element storing one bit. It triggers on the positive edge of the clock and provides complementary Q and Q̅ outputs. Both flip-flops have independent Set (Preset) and Reset inputs, letting you force the output state asynchronously — useful for initialisation or one-shot override in counter and register chains. Clock frequency is rated at 60 MHz, which gives comfortable margin for 8-bit and 16-bit microcontroller bus interfaces running at typical 8–48 MHz clock rates. Propagation delay is 30 ns max at 6 V supply with a 50 pF load, so timing closure in a 33 MHz synchronous bus is straightforward. Supply voltage spans 2 V to 6 V, covering 3.3 V and 5 V logic rails without a level translator. Quiescent current is just 4 µA, making it suitable for battery-backed or always-on logic where the flip-flop holds state while the rest of the board sleeps.
Package and mounting — through-hole 16-DIP
The SN74HC109N comes in a 16-pin plastic DIP (0.300" body width, 7.62 mm pitch), through-hole mount. The supplier device package is 16-PDIP. It ships in a tube, which is the standard format for DIP parts — no reel or tray concerns for manual assembly or low-volume builds. Operating temperature range is -40°C to 85°C, rated for industrial environments — factory automation, motor drives, outdoor telecom cabinets, and HVAC controllers. The 74HC family is CMOS, so input capacitance is 3 pF per pin, and output drive is 5.2 mA sink and source at the rated supply.
Lifecycle and sourcing
The SN74HC109N is listed as Active in production. ROHS3 compliant, so it passes European and global RoHS requirements without exemption paperwork. For BOM planning, this part is a standard 74HC logic device — widely second-sourced across the industry. If you need a dual JK flip-flop in a 16-pin DIP, several manufacturers offer functionally equivalent parts. The 74HC family has long lifecycle visibility; stocking a five-year supply for a mature design is reasonable.